CXMT Says First 4F² DRAM Will Be Server DDR5 RDIMM by Year-End

CXMT president Cao Kanyu said the company's first 4F² DRAM product will be a server DDR5 RDIMM, due by the end of the year. The chip uses a denser cell layout with vertical transistors, cutting each cell's footprint by roughly one-third on paper compared with conventional 6F² designs. No speeds or capacities have been announced.

The company has been working on the technology for years, with papers in 2021, 2023, and 2025, an 8Gb full-array research demo at IEDM 2023, and more than 300 published patent families. CXMT's version, called Vertical Surrounded Gate, stands the transistor channel vertically with the gate wrapped around it, which the company says improves gate control and reduces leakage. The broader industry is also moving toward 4F² and 3D DRAM with hybrid bonding, though rivals like Samsung and SK hynix have not committed to firm timelines.

The announcement leaves many details open. CXMT has not disclosed speed, capacity, process node, named customers, or intended volume, and has not posted an official release. South Korean reports have suggested initial products may only partly use 4F² and that stable volume production is a separate challenge. The company's G5 DRAM platform is already in mass production, and TrendForce put CXMT's global DRAM revenue share at 9.5% in the second quarter, up from 7.6% in the first.