The shift toward multi-chiplet heterogeneous integration promises faster innovation and more flexible silicon, but the design process itself is becoming a data problem. A single assembly can combine internal, external, and open-source IP, each with its own files, specs, and usage rules. The source argues that without disciplined data management, even well-planned 3D-IC projects can spiral into miscommunication, accidental overwrites, and product failures.
The article, written by Siemens staff, breaks the fix into four parts: managing diverse IP sources, enforcing revision control on the design hierarchy, keeping a centralized information hub, and providing instant status tracking. These are presented as non-negotiable for traceability—knowing exactly which version of a chiplet is in play, who changed what, and when. The central hub is described as a single source of truth that cuts cycle times, while status analytics turn stored data into a proactive management tool.
Notably, the source is a single vendor perspective—Siemens's Innovator3D IC Data Management software is named as the solution. That means the framing is commercial, and the four components align neatly with that product's features. Still, the underlying pain points—version chaos, distributed teams, and revision history gaps—are real and widely acknowledged in the industry. The article does not compare alternatives or independent research, so readers should treat its recommendations as one approach rather than a neutral benchmark.