Samsung used Hot Chips 2026 to lay out two distinct strategies for putting compute where the data lives. The first, a CXL-based device called XCENA, pairs memory expansion with a compute engine that can perform operations near the memory array. The second is a processing-in-memory (PIM) design built on LPDDR5X, which embeds arithmetic logic directly into the memory die itself.
Both approaches target the same fundamental bottleneck: moving data between DRAM and the host processor consumes energy and time. By handling some work in or near memory, Samsung aims to reduce that traffic. The sources agree on this motivation, but they highlight a key difference in scope—XCENA works over CXL, making it suitable for server-scale memory pools, while LPDDR5X PIM is aimed at more tightly coupled, lower-power environments like mobile or edge devices.
Neither source provides performance benchmarks or shipping dates, so it's unclear how quickly these will reach production. What's clear is that Samsung is hedging its bets across two memory-compute paradigms, betting that the industry will need both flexible near-memory acceleration and dense in-memory processing depending on the workload.